INFORMATION

Dec. 1, 2017

Toshifumi Imamura was named our new President & CEO.

Atsushi Iwata was appointed to the Chair of the Board.

Oct. 1, 2017

We moved our headquarters.

Apr. 8, 2016

We moved Hiroshima Design Center from Hiroshima Techno Plaza to 4781-4, Misonou, Saijo-cho, Higashi-Hiroshima.

Jul. 10, 2015

Parameters Required for the FPNA was added.

Apr. , 2015

Our homepage was renewed.

Feb. 6, 2012

We received the letter of thanks from Japan Synchrotron Radiation Research Institute (JASRI) and RIKEN.

Jan. 27, 2011

We exhibited the our original toos called FPNA (Floor Plan Noise Analysis) and Analog IPs in the EDS Fair 2011 at Japan.

Apr. 9, 2010

We moved Hiroshima Design Center from VBL, Hiroshima University to Rm# 405, Hiroshima Techno Plaza.

Jan. , 2010

We exhibited the our original toos called FPNA (Floor Plan Noise Analysis) in the EDS Fair 2010 at Japan. We reported on the Nikkei technology online.

Sep. , 2009

We announced noise analysis results using Apache tool in DAC2009, CICC2009.

May 22, 2009

We (Nagata and Iwata) received the technology award from Japan Institute of Electronics Packaging (JIEP). Commemorative lecture slides (Japanese).

Apr. 1, 2009

We opened Kobe Design Center.

Jun. 9, 2008

Our homepage was updated.

Apr. 15, 2007

We moved headquarter to Saijo Otsubo-cho, Higashi-Hiroshima.

Feb. 12, 2007

We announced on-chip noise measurement macros in ISSCC2007 (collaboration with Fujitsu).We reported on the Nikkei technology online.

Jun. 6, 2005

We (Iwata, Morie and Nagata) received the university-launched venture company services prize.