Company NameA-R-Tec Corp.
EstablishmentApril 3, 2001
Capital Fund10 million yen
PresidentAtsushi Iwata
AdviserProf. Yasuhiro Sugimoto (Chuo University)
Technical AdviserProf. Makoto Nagata (Kobe University)
Technical AdviserProf. Takeshi Yoshida (Hiroshima University)
Headquarter1205-10-29, Saijo Otsubo-cho, Higashi-Hiroshima,
Hiroshima, 739-0005, Japan
Phone/Fax: +81-82-422-8378
Hiroshima Design Center4781-4, Misonou, Saijo-cho, Higashi-Hiroshima,
Hiroshima, 739-0024, Japan
Phone/Fax: +81-82-421-4222
Staff MemberFull-time: 5
Collaborative UniversityHiroshima University
Kobe University
Chuo University
Kyushu Institute of Technology
Business CollaborationRF Chips Technology, Inc.
SiliConsortium Ltd.
MSdenshi, Inc.

》Company Profile
》Company Profile (J-GoodTech)


A-R-Tec was established in April, 2001 as a university-launched venture company when I was a professor of Hiroshima University. For 14 years we have developed high-functional and high-performance integrated circuit design techniques to meet demands from more than 50 companies, universities and laboratories.

We possess design techniques in high precision, low noise, low power analog and RF circuitry and continue to expand them to involve the development of a new field in the semiconductor electronics industry. For that purpose we will utilize the latest research outcomes and individuals of universities, and tackle novel technology.

We offer the most appropriate solutions for our customers starting from creating specifications, device selection, ASIC design, PCB design, and measurements for integrated systems to be developed.

Recent demands in signal processing circuits for a variety of sensors include low-noise, low-power amplifiers and ADCs. For example, ultra-low noise multi-channel sensors for electrocorticography (ECoG), ultra-high performance MEMS acceleration/angular acceleration sensors, on-chip noise sensors. We also have been contributed to design and evaluate CMOS image sensors for X-ray detection utilizing SOI technology in request from universities and laboratories.

Our knowledge of noise reduction in signal detection and processing circuits can offer digital crosstalk analysis, noise suppression techniques using a CAD tool called FPNA (Floor Plan Noise Analysis).

Based on those technologies we plan to make an analog front-end (AFE) chip and module for electroencephalography into a product by receiving government subsidies.

Our business also includes contribution to society by developing human resources who can practice design and evaluation with cutting-edge technology.

We all do our best and look forward to working with you.

April 2015, Atsushi Iwata, CEO 

Corporate Philosophy

Our corporate philosophy is to provide design and evaluation techniques of analog and RF circuits and to bring up human resources in the fields, through which we make a great contribution toward the progress of industory and science.

Corporate Vision

  • Specialize in analog and RF circuit design and A-D mixed chip development, and contribute to the progress in advanced infomation society.
  • Bring up analog and RF designers with the OJT program.
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